Multiprocessor systems commonly share resources such as a memory, by using a semaphore stored in either a designated memory location or a register, to establish reliable communications. A semaphore locking operation protocol is used to access the shared resource. Such protocol may involve the use of a lock prefix instruction followed by a bit test and change instruction such as a Bit Test and Set instruction. Such a sequence of instructions causes an active LOCK signal to be generated which signal is then used to block access to the shared resource by another processor or bus master. While the LOCK is active, the subsequent Bit Test and Set instruction accesses the semaphore and allows such bit to be set from a non-busy state to a busy state. The processor can then access the shared resource. If the semaphore bit is busy, the requesting processor must wait until the bit is set to a non-busy state before accessing the shared resource. The locking of the bus prevents more than one requestor from interfering with use of the semaphore.
Currently, some models of the well known, commercially available IBM PS/2 personal computers use a dual port memory that is connected at one port to a processor and at its other port to an expansion bus designed in accordance with the well known Micro Channel architecture. (IBM, PS/2, and Micro Channel are trademarks of International Business Machines Corporation). Under such architecture, the bus (also referred to herein as he MC bus) has no lock line dedicated to transmitting a processor LOCK signal. However, such bus does have a BURST signal line which allows the bus to perform a burst transfer in which a subsequent bus cycle will be granted a bus user so long as the BURST signal is active. The invention deals with improvements to such a system whereby the BURST signal can be used for both burst transfers and lock semaphore operations.
The closest patented art of which we are aware is believed to be U.S. Pat. No. 4,805,106--Pfeifer for METHOD OF AND ARRANGEMENT FOR ORDERING OF MULTIPROCESSOR OPERATIONS IN A MULTIPROCESSOR SYSTEM WITH REDUNDANT RESOURCES, which discloses using a dedicated bus read/write/modify signal line for semaphore operations. In contrast, the invention does not require a dedicated bus lock line but uses a bus BURST signal line to perform a semaphore operation in addition to I/O burst transfers. Further, the invention allows a local processor to access a memory controlled by a semaphore while the semaphore is being accessed.